FPGA Design/ Verification Engineer

Chicago, IL

Post Date: 04/25/2017 Job ID: 8879 Category: Opportunistic
FPGA Design / Verification Engineer
Our client is seeking an FPGA Design / Verification Engineer to become an integral member of the hardware engineering team dedicated to the development of HDL solutions for our high frequency, low latency electronic trading systems. The candidate will support new and existing solutions while helping define design assurance processes for programmable hardware. Responsibilities will include developing requirements with cross-functional teams, writing HDL code targeted for design and verification, and providing hands-on testing and integration of FPGA designs for various strategies and financial exchanges. The role will be a part of the development team and provide the individual with exposure to traders and strategy developers. The ideal candidate should have a passion for finance and a strong sense of good software design. The successful candidate will also be a self-starter, have a strong sense of ownership and be driven to provide technical and intellectual solutions to business problems.
Primary Responsibilities include:
  • Work as both a FPGA design and verification engineer in a dynamic environment
  • Participate in design and architecture decisions for modules and FPGAs
  • Participate in Hardware Process Development and Improvement
  • Implement HDL design and verification blocks using Verilog / System Verilog
  • Participate in all phases of FPGA design Flow (Synthesis, Place & Route, and Timing Closure)
  • Bring up and validate circuit boards and FPGAs
  • Bachelor or Masters in Electrical Engineering, Computer Engineering, Computer Science or other related disciplines
  • Ability to contribute as an individual as well as a part of the team to share responsibility for development of high frequency, low latency trading systems
  • HDL Experience with Verilog, System Verilog, VHDL or VHDL-2008
  • Experience with FPGAs and CPLDs from vendors: Xilinx, Altera, Microsemi (Actel), and/or Lattice
  • Experience with FPGA design and Verification Tools
  • Experience Integrating embedded systems
  • Experience with Riviera, Modelsim, or Questasim simulators
  • Experience with Synopsys tools for design
  • High-reliability design and verification
  • Understanding of TCP/IP, Datapath Pipelines, State Machines, Arithmetic Operations
  • Experience with advanced verification techniques: Assertion-based Verification, UVM, and Constrained Random Verification
  • Programming and Scripting skills: C, C++, TCL, bash, PERL, Python, batch
  • Simulink Autocoding to HDL
  • Control Theory implementations on FPGA / ASIC
  • Digital Signal Processing on FPGA / ASIC
  • Experience with exchange protocols such as FIX/Fast, OUCH, ITCH, etc.
FPGA, Verilog, VHDL, C++, TCP/IP, FIX/Fast

Christy Ghiselli

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